PLL
See Also: Phase Locked Loops
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Product
Clock Distribution Devices
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Analog Devices offers ultralow jitter clock distribution products that fan out given signals for wireless infrastructure, instrumentation, broadband, ATE, and other applications demanding subpicosecond performance. Our clock products are ideal for clocking high performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). ADI clock ICs integrate PLL cores, dividers, phase offset, skew adjust, and clock drivers in small chip scale packages.
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Product
SWR True Antenna Analyzer
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SWR True Antenna Analyzer is a versatile analyzer covering all major communication bands from 30MHz to 2700MHz. The SWR True will analyze antennas and cables. Measurements are represented graphically as VSWR or Return Loss plots. The built in PLL synthesized generator offers a superior accuracy with small step size. The internal operating system controls measurement, display and the I/Os allowing serial communication to PC, USB to memory stick and USB Serial communication. The I/O options are used to write plots to either memory sticks or to a connected PC, the I/Os can also be used to operate the instrument, giving commands and receiving data. For documentation reference the instrument has a real time clock. Multilayer menus are used to setup and control the operation of parameters. The SWR True instrument is small, handy and light weight battery operated with more than 6 hours of continuous operation on the internal NiMh cells. Feature with XML data handling and application viewer is included. Accessory kit with soft carrying bag, car charger and coax adapters for standard types.
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Product
6.4-GSPS Single Channel or 3.2-GSPS Dual Channel, 12-bit, RF-Sampling ADC
ADC12DJ3200 / LMX2594
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Analog-to-digital converter (ADC) and phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) that deliver the widest bandwidth, lowest phase noise and highest dynamic range in the industry. The wideband ADC12DJ3200 is the fastest 12-bit ADC, delivering speeds up to 6.4 GSPS. The LMX2594 is the industry's first wideband PLL solution to generate frequencies of up to 15 GHz without using an internal frequency doubler.
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Product
Develop - Simulate - Validate JTAG / IJTAG based IP
NEBULA
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You, your vendors and your customers being able to use one common interface to control and observe on-chip IP, resources and instruments. The figure below shows an example IC. The new IEEE 1149.1-2013 standard supports an init-data register for configuring the analog paramaters of I/O as well as controlling on-chip PLLs. The standard further extends this by defining in BSDL user test data registers or 'scan chains'. These registers enable the ability of generic software to control and observe mission mode IP and instruments simply by describing the register interface in BSDL.
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Product
Continuous Time Interval Analyzers
GT668PXIe-40
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GuideTech’s GT668PXIe-40 PXI 3U form factor, meets industrial standard chassis with an expandable platform, achieving optimal test system at low cost. High accuracy 50MHz time base with NIST traceable calibration. Some of the GT668PXIe-40 measurements include Jitter measurements, PLL & Clock Jitter, Spread Spectrum Modulation, PLL Lock Time, Frequency, Period, Pulse Width, Skew, Tpd, Rise/Fall Time, Time Interval Error and more.
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Product
Signal Analyzer
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bsw TestSystems & Consulting AG
The simplest way to measure the phase noise is to compare the Device-Under-Test (DUT) to the source of a spectrum analyzer. With the SA set at the same frequency as the OUT, you see the sum of the SA's and DUT's sideband-power spectrum on the SA display. It is a simple and straight forward method well suited for free running VCO's where the SA is easily an order better.You can improve on this method by establishing a Phase Lock (PLL) between the DUT and the Local Oscillator and create a zero-IF or base-band spectrum analyzer system.
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Product
Clock Generation Devices
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Analog Devices offers ultralow jitter clock generation products for wireless infrastructure, instrumentation, broadband, automatic test equipment, and other applications demanding subpicosecond performance. Our clock products are ideal for generating the high speed, low noise clock signals required to clock high performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). ADI clock ICs integrate PLL cores, dividers, phase offset, skew adjust, and clock drivers in small chip scale packages.
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Product
500 / 1000 / 1500MHz Synthesized Signal Generator
Model 2100 Series
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- Combine with DDS and PLL Techniques- 1500MHz Maximum Frequency- 1 ppm High Accuracy, Less Distortion- Dual Independent Outputs- AM, FM, FSK, PSK Modulation
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Product
User Programmable Logic
PCIe-Spartan-VI
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User Programmable logic - Spartan VI 100 with 40 differential and 12 TTL IO plus PLL(24). 16 DMA ports, to support 8 full duplex byte lanes between the Bus and User FPGAs. Additional GPB interface to support R/W operations to registers etc. Driver and reference SW package includes user defined R/W to User FPGA to support User Architecture without a new driver.
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Product
Phase Locked Loop with Integrated VCO
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PLL with integrated VCOs provide local oscillator sources and clock sources for communications (COMMS) , test and measurement (ETM) and aerospace/defense (ADEF) applications. ADI's PLLs with integrated VCO portfolio includes both narrowband and wideband parts, supporting frequencies up to 13.6GHz. Our PLLs with integrated VCO, as well as our full PLL portfolio including integer-N and fractional-N PLLs, feature best-in-class performance for phase noise, jitter, and spurious, and also feature high levels of integration in small form factor packages.
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Product
Fractional-N PLLs
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Analog Devices’ leading PLL synthesizer family includes single and dual PLLs, as well as fractional-N and integer-N, and highly integrated PLLs with VCOs. They feature best-in-class performance, phase noise, and integration.
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Product
PLD For Bridging, Infinitely Reconfigurable I/O Expansion.
MachXO
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*Up to 27.6 Kbits sysMEM™ embedded block RAM and up to 7.7Kbits distributed RAM*SRAM based logic can be reconfigured in milliseconds using JTAG port*IOs support LVCMOS, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, RSDS*Up to two analog PLLs per device that enable clock multiplication, division, and phase shifting*Available in TQFP, csBGA, caBGA and ftBGA packages
